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SPIL provides comprehensive packaging, offering lead frame base and substrate base packages, with either wire bond or flip chip interconnections. These packages satisfy most applications for customers serving the PC, hand-held product, consumer product and wire communication markets.

Besides the conventional SOP and QFP packages, SPIL has been devoted to the development of wafer thinning, fine-pitch wire bonding, stacked-die bonding, wafer bumping and flip-chip assembly technologies in order to realize advanced packages like: QFN, PBGA, TFBGA, Stacked-die CSP, WLCSP, Memory card and FCBGA.

In order to meet our customer's future packaging requirments, we are continuously developing the next generation assembly technologies. Currently studies include: Package-on-Package, Package-in-Package and 65 um Cu/low-K packaging solutions.

BGA CSP
 
Stacked Die   Multi-Package
The electronics market trend is to offer more functionality, better performance, higher density, lower cost, along with smaller footprints and lower profiles. Siliconware Stacked die packages are continuously being upgraded to meet these demands...   Siliconware's Multi-Package BGA provides an alternative multi-chip module solution when know-good-die, KGD, is not feasible...
Memory Card   CIS
Siliconware's flash memory card family integrates multiple chips, either placed side-by-side or stacked vertically, with passive components to enhance electrical performance...  
Quad & Dual   TCP/COF
  The TCP/COF is a package technology which employs a flexible printed circuit film (with sprocket holes for transportation that is similar to photographic films) bonded with gold bumps on chip to make the electrical input and output connections between the circuit board and the display panel for driver function...
 
 
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