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BGA EDHS-BGA Flip Chip Packages PBGA CSP FC-CSP LGA QFN TFBGA / VFBGA WLCSP WLBGA Stacked Die Multi-Package Memory Card Quad & Dual Quad QFP LQFP TQFP Thermally Enhanced QFP E-pad LQFP E-pad TQFP Dual PDIP SOJ SOP SSOP TSOP I / COL TSOP I TSOP II / LOC-TSOP II

Plastic Dual In-line Package Siliconware's Plastic Dual In-Line package is a lead frame based, through hole package. It is a well established package that has continued to provide solutions to design engineers around the world. With proven technology and materials, Siliconware is committed to offering high quality & reliable PDIPs. APPLICATIONS Siliconware's PDIP is suitable for packaging logic, memory, micro and video controllers. It is commonly used in consumer, commercial, automotive electronics and telecommunications. FEATURES • Through hole package • 32 to 42 lead counts • Full in-house design ability • JEDEC standard outlines Process Flow Material Wafer Back Grinding (Option) Wafer Mount Wafer Saw & Clean 2nd Optical QC Monitor Die Attach Epoxy: Hitachi EN-4900GC Epoxy Cure 150 C / 90 mins Wire Bond Gold Wire: 99%~99.99% Au 3rd Optical Inspection Molding Compound: Hitachi : 9200 serier Sumitomo EME-G600 Series Marking White Ink / Laser Post Mold Cure 175 +/- 5 C, min 1hr Solder Plating Sn/Pb : 85/15 ; Sn/Bi : 98/2 ; Sn:100 (SPIL STD for Halogen free PGK.) Forming & Singulation Final Visual Inspection Packing Anti-static Tube   RELIABILITY • Moisture Sensitivity JEDEC Level 3 (30°C / 60% RH / 192 hours) • Temp. Cycle Test 65/+150°C, 1000 cycles • Pressure Cooker 121°C, 100% RH, 2 atm, 240 hours Note: Sample preconditioning prior to environmental tests is as follows: Baking 125°C, 24 hours ◊ Pre-con: 30°C / 60% RH / 192 hours ◊ IR Reflow 3 times, 260°C

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