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CSP Family Overview
Siliconware's Chip Scale Packages offer small form factors for space and weight saving solutions. Since it is based on the mature BGA technology and infrastructure, a quick time to market can be achieved with high volume capabilities. Included in the Siliconware CSP line-up is laminate-based rigid substrates and lead-frame based designs.
What is a CSP Package?
A Chip Scale Package (CSP) is defined as a package where the bare die occupies 80% or more of the package, so the profile can be a near chip size package outline.
Siliconware's CSP family includes the rigid CSP – TFBGA, VFBGA utilizing BT substrates, and the lead frame based CSP - QFN which utilizes cost effective lead-frame technology.
Why use CSP Package?
CSP Packages offer you a near die size package outline that is suitable for low to moderate pin counts. Electrical performance is enhanced due to shorter interconnections. The CSP Package family applications for semiconductors include memory, microprocessors/controllers, analog, Flash, SRAM, DRAM, ASICs, DSPs, RF devices and PLDs. Siliconware's extensive experience, robust infrastructure and strong R&D team allow us to share the latest technology developments with you and still provide packages with reduced turnaround times and high volumes.
 
 
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