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QFP Quad Flat Pack Siliconware's Quad Flat Pack provides medium high pin count solutions (<296) with 4-sided peripheral leads. A minimum pitch of 0.4 mm makes high design feasible. A variety of package sizes ranging from 14 x 20 mm to 32 x 32 mm and pin counts from 100 to 296 are ready for your choice. APPLICATIONS Siliconware's QFP product line is suited to meet the most demanding applications such as controllers, micro-processors, ASIC, DSP, gate arrays (FPGA / PLD), SRAMs, PC Chipsets and other technologies. FEATURES • 14x20 mm to 32x32 mm body sizes • 100 to 296 lead counts • Fine lead pitch down to 0.40 mm • Stack die design / Multiple chip module design • Copper leadframe material • Full in-house design ability • JEDEC standard outline Process Flow Material Normal Lead Free/Green Wafer Back Grinding (Option) Wafer Mount Wafer Saw & Clean 2nd Optical Inspection Die Attach Epoxy Cure Plasma Clean Wire Bond Gold Wire,Copper Wire 3rd Optical Inspection Molding Marking White ink or Laser Post Mold Cure Deflash & Trim Solder Plating Sn/Pb 85/15 Matte Tin, Sn/Bi 98/2 Forming & Singulation Final Visual Inspection Packing Tray   RELIABILITY • Moisture Sensitivity JEDEC Level 3 (30°C / 60% RH / 192 hours) • Temp. Cycle Test -65/+150°C, 1000 cycles • Pressure Cooker 121°C, 100% RH, 2 atm, 168 hours • High Temperature Storage Life 150°C ,1000 hours   Note: Sample preconditioning prior to environmental tests are as follows: (Normal) Baking 125°C, 24 hours ◊ Pre-con: 30°C / 60% RH / 192 hours ◊ IR Reflow 3 times, 225°C (Lead Free) Baking 125°C, 24 hours ◊ Pre-con: 30°C / 60% RH / 192 hours ◊ IR Reflow 3 times, 250°C

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