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Small Outline J-lead package
Siliconware's Small Outline J-lead package is a lead frame based with "J" form lead suitable for low pin count devices . The footprint is reduced due to its "J" lead form. Body width ranges from 300 to 400 mils with a pitch of 50 mils available as well. It is designed to accommodate a wide variety of chip sizes into industry accepted dimensions. With proven technology and materials, Siliconware is committed to offer high quality and reliable SOJs
Siliconware's SOJ is suitable for memory and low pin count controller applications. Markets include consumer (audio /video / entertainment), telecom (pagers/cordless phones), RF, CATV, telemetry, office appliances (fax/copiers/printers/PC peripherals) and automotive industries.
• "J" lead formatted and lead frame package
• 300 - 400 mils body width
• 28 to 40 lead counts
• Ink/Laser marking available
• Full in-house design ability
• JEDEC standard outlines
Process Flow Material
Wafer Back Grinding (Option)  
Wafer Mount  
Wafer Saw & Clean  
2nd Optical Inspection  
Die Attach Epoxy: Hitachi EN-4900GC
Epoxy Cure 150°C / 90 mins
Wire Bond Gold Wire: 99.99% Au
3rd Optical Inspection  
Molding Compound:
Sumitomo EME-G600 Series
Hitachi 9200 series (Memory Device)
Marking White Ink / Laser
Post Mold Cure 175 +/- 5°C, min 1hr
Deflash & Trim  
Solder Plating Sn/Pb: 85/15 ;
Sn/Bi:98/2 ;
Sn:100 (SPIL STD for Halogen free PKG.)
Forming & Singulation  
Final Visual Inspection  
Packing Anti-static Tube
• Moisture Sensitivity JEDEC Level 3 (30°C / 60% RH / 192 hours)
• Temp. Cycle Test -65/+150°C, 1000 cycles
• Pressure Cooker 121°C, 100% RH, 2 atm, 240 hours
Note: Sample preconditioning prior to environmental tests is as follows:
Baking 125°C, 24 hours ◊ Pre-con: 30°C / 60% RH / 192 hours ◊ IR Reflow 3 times, 260°C
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