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3DIC Technology
Three-Dimensional Integrated Circuit (3DIC) is a package technology which is gathering and vertically stacking homogeneous or heterogeneous dies into Multi-Chip-Module (MCM) with Through-Silicon-Via (TSV). It is a platform for mono- or multi-functional integration. 2, 4, and 8 memories could be integrated in one single package. In the future, CPU, GPU, DRAM and main-broad might be all shrunken into one chip package. 3DIC is a solution of high bandwidth, small form factor and multi-function integration.
A Through-Silicon-Via provides a vertical electrical interconnection passing through a silicon wafer or die. These TSVs are manufactured in wafer form and filled with Cu. TSVs provide the interconnection of die to die and die to substrate.
3DIC innovation
SPIL has been developing 3DIC technologies & collaborating with customers and partners to provide the best solution.
Innovation of Key Technologies: Innovation of designing:
SPIL has been developing grinding and reveal technologies for interposer or active die wafer with TSVs. In assembly, the high accuracy of micro bumping has been developed for 3D die stacking. The baseline of these key technologies is established in SPIL. SPIL precedes the tooling design, advanced simulation (stress, thermal and warpage) and process demonstration to control the key factors for product development. This will help discovering the potential risk of product or design.
Innovation of process: Innovation of key material:
The capability of SPIL 3DIC process has already been advancing into micro scale. The accuracy of process control is needed for micro-bumping, TSV reveal or die-bonding. The database and baseline of the processes has already been established. SPIL's material lab provides the solution of material validation and characterization to figure out the best condition.
Key enabling technology for 2.5D/3DIC die stacking in SPIL
These key technologies are available in SPIL.
MEoL (Middle End of Line)
• Carrier Bond/de-bond Technology
• Wafer Thinning Technology
• TSV Reveal Technology
• C4 and Micro Bumping Technology
BEoL (Back End of Line)
• Die Stacking Assembly Technology
In the future, 3DIC will be a trend of package solution which provides high performance, small form factor and low cost benefit. SPIL will put the best effort to co-work with customer to develop the optimal solutions to enable 2.5DIC technology, and will keep focusing on the technologies for 2.5D/3DIC and collaborate with customers/partners to keep on track of industry trend.
 
 
 
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